The present invention relates to a semiconductor device, a control system, and a synchronization method and can be suitably used, for example, for a semiconductor device including a counter.
Methods for achieving synchronization between two semiconductor devices have been known.
Japanese Unexamined Patent Application Publication No. 2015-173414 discloses an electronic control apparatus for achieving synchronization between two semiconductor devices, a main device and a sub device. In the electronic control apparatus, the main and sub semiconductor devices each include a timer. In the synchronization method disclosed in Japanese Unexamined Patent Application Publication No. 2015-173414, the main device outputs a synchronous signal to the sub device when the value of the timer has reached a predetermined value and the sub device causes the value of the timer that it includes to be synchronized with the value of the timer of the main device in accordance with this synchronous signal. In this electronic control apparatus, an oscillator is attached to the main device to generate clocks. These clocks are input to the sub device. That is, the clock source in the main device is the same as that in the sub device.
Japanese Unexamined Patent Application Publication No. 2016-13044 discloses a method in which an operation timing adjustment unit outputs a signal for synchronization to two devices and the two devices correct timers included therein to a predetermined value in accordance with the synchronous signal.
Japanese Unexamined Patent Application Publication No. 2016-13045 discloses a method in which a Pulse Width Modulation (PWM) signal generated by a main device is input to a sub device, the sub device obtains a difference between a time of a rising edge of the PWM signal that has been input thereto and a time of a rising edge of a PWM signal that the sub device has generated, and the sub device corrects a timer for generating the PWM signal.